file_id.diz
=============================================================================
h u g i s i z e c o d i n g c o m p e t i t i o n
g e n e r a l i n f o
=============================================================================
---------------------------------- [RULES] ----------------------------------
Unless stated otherwise in the competition specific rules, your entry must
... follow the competition specific rules.
... have the filename "entry.com".
... work in a Windows95 DOS box.
... work on the Adok's PC. an Intel Pentium 600, 64 MByte RAM,
running Windows 98 [Version 4.10.2222].
... use only instructions up to i586 (Pentium).
Unless stated otherwise, your entry must NOT
... depend on its file name, i.e. it still has to work after renaming
it to, say, FOOBAR.EXE, or any other valid DOS executable file name.
... depend on its drive or path.
... crash unless where explicitly stated by the rules.
... use MMX instructions or other non-Pentium instructions like CMOVcc;
look at the "x86.txt" file for further information.
... use the special registers CR0..4 (this includes the MSW), DR0..7, or
RDMSR/WRMSR instructions.
... use any external files or create new files on the disk.
... rely on any previously loaded code or data in memory, excluding
DOS itself.
... disable interrupts for longer than 1/50 second in a row on
a 200MHz Pentium.
... have been modified by means of an executable-packer (i.e., entry.com
must be the product of assembling entry.asm).
You may assume that
... the registers have these values (all in hex):
(xx - means an unknown value which MUST NOT be assumed)
EAX = xxxx****
AL = 00 if first FCB has valid drive letter, FF if not
AH = 00 if second FCB has valid drive letter, FF if not
EBX = xxxx****
BL = 00 if first FCB has valid drive letter, FF if not
BH = 00 if second FCB has valid drive letter, FF if not
ECX = xxxx00FF
EDX = xxxxxxxx
DX = CS = DS = ES = SS = xxxx, 0080 <= DX <=9000.
ESI = xxxx0100
EDI = xxxxFFFE
EBP = xxxx09xx
ESP = xxxxFFFE
EIP = xxxx0100
EFLAGS (binary) = xxxxxxxx xxxxxxxx xxxxx01x xx0x0x1x
i.e.
DF = 0
IF = 1
other flags = x
WORD [FFFE] = 0000
Layout of PSP: see [Memory Layout]
... that the program is not loaded high.
... that DPMI services are available.
... FCB functions can be used to access files whose name is given in 8.3
format.
You must NOT assume that
... the FPU state is defined; you have to use FINIT to initialize it
before using it.
If you use other's people code (from previous compos or the like), please
add a comment about this to your code, including a reference to the original
program. Oh yes, and please comment your code.
------------------------------ [MEMORY LAYOUT] ------------------------------
The PSP is a copy of a buffer containing the history of command line
arguments. You can assume that all preceding command line arguments were
smaller than 100 bytes. That is:
PSP:[E5h] = 0Dh or 0
PSP:[E6h]...[FFh] = 0
Format of Program Segment Prefix (PSP) (located at initial DS:0000):
[according to Ralf Brown's Interrupt List]
Offset Size Description (Table 01378)
00h 2 BYTEs INT 20 instruction for CP/M CALL 0 program termination
the CDh 20h here is often used as a signature for a valid PSP
02h WORD segment of first byte beyond memory allocated to program
note: do not assume that this word contains 0A000h
04h BYTE (DOS) unused filler
05h BYTE CP/M CALL 5 service request (FAR CALL to absolute 000C0h)
06h WORD CP/M compatibility--size of first segment for .COM files
08h 2 BYTEs remainder of FAR JMP at 05h
0Ah DWORD stored INT 22 termination address
0Eh DWORD stored INT 23 control-Break handler address
12h DWORD DOS 1.1+ stored INT 24 critical error handler address
16h WORD segment of parent PSP
18h 20 BYTEs DOS 2+ Job File Table, one byte per file handle, FFh = closed
2Ch WORD DOS 2+ segment of environment for process (see #01379)
2Eh DWORD DOS 2+ process's SS:SP on entry to last INT 21 call
32h WORD DOS 3+ number of entries in JFT (default 20)
34h DWORD DOS 3+ pointer to JFT (default PSP:0018h)
38h DWORD DOS 3+ pointer to previous PSP (default FFFFFFFFh in 3.x)
3Ch BYTE DOS 4+ (DBCS) interim console flag (see AX=6301h)
3Dh BYTE (APPEND) TrueName flag (see INT 2F/AX=B711h)
3Eh 2 BYTE ?
40h 2 BYTEs DOS 5+ version to return on INT 21/AH=30h
42h 7 BYTE ?
49h BYTE unused by DOS versions <= 6.00
4Ch WORD ?
4Eh 2 BYTEs unused by DOS versions <= 6.00
50h 3 BYTEs DOS 2+ service request (INT 21/RETF instructions)
53h 2 BYTEs unused in DOS versions <= 6.00
55h 7 BYTEs unused in DOS versions <= 6.00; can be used to make first FCB
into an extended FCB
5Ch 16 BYTEs first default FCB, filled in from first commandline argument
overwrites second FCB if opened
6Ch 16 BYTEs second default FCB, filled in from second commandline argument
overwrites beginning of commandline if opened
7Ch 4 BYTEs unused
80h 128 BYTEs commandline / default DTA
command tail is BYTE for length of tail, N BYTEs for the tail,
followed by a BYTE containing 0Dh
-------------------------------- [CHECKING] ---------------------------------
Usually, there is a test suite provided with the competition rules, which is
irregularily updated; new versions can be found at
http://www.hugi.de/compo/
However, the test suites usually only serve as a GUIDE, so please check your
program against the rules before submitting. Also be aware that the test
suite itself may contain bugs; if you find one, please send an e-mail about
it to Adok (cdvolko@gmx.net) or (preferred) to the compo mailinglist (see
below).
------------------------------- [SUBMISSION] --------------------------------
You have to send
- the sourcecode of your entry
- the executable of your entry ("entry.com")
to Adok so that he can analyse and evaluate your entry.
Send your entries to:
cdvolko@gmx.net
It would be best if you could submit your entry as early as possible. Then
Adok can inform you about bugs, if he finds any, and you have enough time to
fix them. Attention: if he finds no bugs, this doesn't automatically mean
that your entry is bug-free; see also CHECKING (above).
You can submit updates to your entries all the time till the deadline.
Entries that do not agree with these rules will be disqualified. Their coders
will be informed about the mistake, and they can re-submit a bugfixed version
unless the compo is over.
Only one entry per coder can qualify; if two or more coders work together on
a single entry, it will count as a joint entry for those coders; no other
entries of these coders can qualify. Note that the entry will count as a
entry of this group of coders for the world league table.
----------------------------- [PUBLIC JUDGEMENT] ----------------------------
After the deadline for entry submission, as soon as the entries and the beta
results are released, the public judgement starts. During this week you can
discuss and object to the entries that seem to break some rule. Please send
your objections to the compo-mailinglist (see below). Adok and/or a jury
formed by him will check if your objections are according to the rules.
If a hidden flaw is found in one of the originally accepted entries during
the public judgement period, public judgement will decide what to do with the
entry. Possible consequences include disqualification and penalties.
------------------------------- [PRE-RESULTS] -------------------------------
Preliminary results of this compo will be released on the compo-web-site and
always updated after receiving a new entry. In this way the compo will
hopefully be exciting.
Compo-web-site URL:
http://hugi.de/compo/
---------------------------------- [PRIZES] ---------------------------------
I'm sorry if I disappoint you, but there are no material prizes. Everything
is just a matter of fun, honor and fame. Moreover, the 30 best competitors
will get points and be listed in the 'World League Table of Assembly'
situated at the compo-web-site. Reaching a good place at a compo and even
more in the World League Table of Assembly is a good visiting-card and
recommendation for every competitor!
------------------------------ [MAILING LIST] -------------------------------
The purpose of the Hugi Compo mailing list is to inform about new compos and
provide a discussion forum for the competitors. At the moment there are about
220 subscribers.
To subscribe send a mail to hugi-compo-subscribe@yahoogroups.com. You'll get
an automatically generated mail which confirms your subscription within a few
hours. Then you start getting the mails the others have posted to this
mailinglist. You will have to subscribe to write mails to the mailinglist.
Mails for the list have to be sent to:
hugi-compo@yahoogroups.com
If you want to subscribe, send a mail to:
hugi-compo-subscribe@yahoogroups.com
If you want to unsubscribe, send a mail to:
hugi-compo-unsubscribe@yahoogroups.com
The mailing list archive can be found at
http://www.egoups.com/groups/hugi-compo/
-------------------------------- [ADDRESSES] --------------------------------
Send your entries to:
cdvolko@gmx.net [Adok/Hugi]
Compo-homepage (pre-results, world league table, test suites etc.):
http://hugi.de/compo/
Subscribe to the mailing list:
hugi-compo-subscribe@yahoogroups.com
Unsubscribe from mailing list:
hugi-compo-unsubscribe@yahoogroups.com
Mailing list archive:
http://www.yahoogroups.com/groups/hugi-compo/
-----------------------------------------------------------------------------
Thanks for reading this file!
Original rules by Adok
Extended and revised by INT-E
Here is some of the math used to determine the value of the Golden Ratio.
STEP 1:
Phi can be determined using the ratios of these line segments.
A
------------+-------
B C
phi = A/B = B/C
A = B + C
If we let B = 1 then we are left with two unknowns, A and C. With the two
equations, we can solve for A and C, and A = phi.
phi = A/1 = 1/C
A = 1 + C
phi = 1/C
phi = 1+C
The value of C in the second equation is:
C = phi-1
Substituting this into the first equation gives:
phi = 1/(phi-1)
Multiplying both sides by (phi-1):
phi(phi-1) = 1
phi^2 - phi - 1 = 0
The general solution for a quadratic equation is:
-b +/- sqrt(b^2 - 4*a*c)
x = --------------------------
2*a
Thus:
-(-1) +/- sqrt(-1^2 - 4*1*(-1))
phi = ---------------------------------
2*1
1 +/- sqrt(5)
phi = ---------------
2
1 + 2.236
phi = ----------- = 1.6180
2
1 - 2.236
phi = ----------- = -0.6180
2
Since phi = A, and a line segment doesn't have a negative length, we
choose the first answer.
STEP 2:
Now we have an equation for computing phi:
1 + sqrt(5) sqrt(5)
phi = ------------- = 1/2 + ---------
2 2
The only "little" problem is how do we compute the sqrt(5) to a few
thousand places? The FPU only provides about 16 decimal places.
The answer is we use a Taylor's series expansion, which uses only
4-function arithmetic. We can write routines that do this arithmetic with
(essentially) unlimited precision.
Doing a bit of algebra converts the above equation into a form suitable
for Taylor:
phi = 1/2 + (1 - 1/5)^-.5
The general solution to the second term can be looked-up in a handbook:
n(n+1)x^2 n(n+1)(n+2)x^3 n(n+1)(n+2)(n+3)x^4
(1-x)^-n = 1 + nx + ----------- + ----------------- + ---------------------- +
2! 3! 4!
Thus:
.5(.5+1).2^2 .5(.5+1)(.5+2).2^3
(1-.2)^-.5 = 1 + .5*.2 + -------------- + -------------------- + ...
2! 3!
This certainly seems like a step in the wrong direction. Things are
getting MUCH bigger rather than smaller. However note that there is a
pattern to the terms in the expansion. Each is equal to the previous
one times (n+i)x/(i+1). For example when i=2 the term is:
n(n+1)x^2 / 2! * (n+2)x/(2+1) = n(n+1)(n+2)x^3 / 3!
STEP 3:
The example program uses another trick called the spigot algorithm. This
computes the digits three at a time. The algorithm is tricky and best
explained by its discoverers:
http://www.mathpropress.com/stan/bibliography/spigot.pdf
Here are a couple other links that may be helpful:
http://web.comlab.ox.ac.uk/oucl/work/jeremy.gibbons/publications/spigot.pdf
http://numbers.computation.free.fr/Constants/TinyPrograms/tinycodes.html
-Boreal
Place Handle, name or group Country Size in bytes
1 Digimind Russia 61
2 TAD United Kingdom 67
3 claw Germany 69
4 fabled Finland 71
5 Beeblebrox Ukraine 74
6 Chut Hungary 76
7 Magne Eriksen Norway 80
8 Jeff US of A 90
9 Boreal US of A 98
10 ATV Finland 107
11 Team Lixaanli - 111
12 Mathimaaran India 118
13 Flyke Denmark 136
14 Bushy Australia 146
Hugi Compo #26
The Golden One
This time your task is to create the world's smallest program that
displays the Golden Ratio. This is the ratio of dividing a line segment A
into two parts B and C such that A is to B as B is to C.
A
------------+-------
B C
This deceptively simple ratio has fascinated mathematicians for centuries.
It can be written as A/B = B/C.
The ratio A/B is usually designated by the Greek letter phi, and it is
approximately equal to 1.618.
Now if your task were to simply output "1.618", it wouldn't be much of a
challenge. Printing a text string would do. The challenge is that your
entry must print the value of phi for 2400 places after the decimal
point, rounded to the nearest value. You may use a text string if you
want, but it's very unlikely to be a winning strategy.
So that an automated tester can be used to check your program, it must
output the digits to the standard output device (stdout). The exact
format must be: "1.618...<cr><lf>" with, of course, the dots being
replaced by the proper digits.
Your program must be called "entry.com".
In case these rules aren't crystal clear, and to give you a giant hint
for a great algorithm, an example program is provided (example.asm).
To help verify that you haven't overlooked some nasty little detail, a
test suite is provided. Simply run test.bat.
Send your entry.com file along with its source code to Sniper at:
------->> fys@frontiernet.net <<-------
The compo deadline is May 31, 2006 at midnight (Mountain Standard Time).
You may enter as often as you want until the deadline (in fact you are
encouraged to do so to add to the excitement of the compo).
To avoid putting too much burden on Sniper, your entry must complete the
test suite in less than 5 minutes on his computer.
Besides these rules, you must follow the general rules that apply to all
compos (see general.txt).
If you have any questions or comments, feel free to post them on:
hugi-compo@yahoogroups.com
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ
A 'rough' i586 instruction guide
by TAD 1999
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ
Warning:
ÄÄÄÄÄÄÄÄ
This may (and probably does) contain errors...
please consult official documents before sending flamez.
This is only meant to be a rough guide and is intended
to show only those 80x86 instructions upto and including
the i586 (Intel Pentium) which may be used for the
Hugi Size Coding Competitions. You will note that the
MMX, 3d-now! and other non-Intel instructions have been
ommitted, these are NOT allowed.
If you require further information about any instruction
then please check out the OPCODES.LST information file in
Ralf Brown's excellent interrupt list which is available
on the internet.
References:
ÄÄÄÄÄÄÄÄÄÄÄ
- Intel Pentium documentation
- OPCODES.LST - released with Ralf Brown's interrupt list
- MASM6 quick-help guide
Web Sites:
ÄÄÄÄÄÄÄÄÄÄ
- www.sandpile.org
- www.x86.org
- www.intel.com
Key:
ÄÄÄÄ
++ opcode is used as a prefix/override
~~ documented on earlier CPU(s) but not Pentium
?? undocumented but described in OPCODES.LST (Ralf Brown)
// well known (and used), but undocumented
!! a possibly dangerous instruction, be careful !!
r8 8-bit register (AL CL DL BL AH CH DH BH)
r16 16-bit register (AX CX DX BX BP SI DI)
r32 32-bit register (EAX ECX EDX EBX ESP EBP ESI EDI)
r/m8 8-bit register or memory operand
r/m16 16-bit register or memory operand
r/m32 32-bit register or memory operand
imm8 8-bit immediate value
imm16 16-bit immediate value
imm32 32-bit immediate value
Flags:
ÄÄÄÄÄÄ
O (OF) - overflow flag
D (DF) - direction flag
I (IF) - interrupt-enable flag
S (SF) - Sign flag
Z (ZF) - zero flag
A (AF) - aux. flag (decimal half/nibble carry)
P (PF) - parity flag
C (CF) - carry flag
x flag is set according to result
? undefined (ie. random) value
- flag is NOT affected by instruction
0 flag is cleared
1 flag is set
opcode bytes instruction ODIT SZ-A-P-C
ÄÄÄÄÄÄÄÄÄÄÄÄ ÄÄÄÄÄÄÄÄÄÄÄ ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
00 /r ADD r/m8, r8 x--- xx x x x
01 /r ADD r/m16, r16 x--- xx x x x
01 /r ADD r/m32, r32 x--- xx x x x
02 /r ADD r8, r/m8 x--- xx x x x
03 /r ADD r16, r/m16 x--- xx x x x
03 /r ADD r32, r/m32 x--- xx x x x
04 ib ADD AL, imm8 x--- xx x x x
05 id ADD EAX, imm32 x--- xx x x x
05 iw ADD AX, imm16 x--- xx x x x
06 PUSH ES ---- -- - - -
07 POP ES ---- -- - - -
08 /r OR r/m8, r8 0--- xx ? x 0
09 /r OR r/m16, r16 0--- xx ? x 0
09 /r OR r/m32, r32 0--- xx ? x 0
0A /r OR r8, r/m8 0--- xx ? x 0
0B /r OR r16, r/m16 0--- xx ? x 0
0B /r OR r32, r/m32 0--- xx ? x 0
0C ib OR AL, imm8 0--- xx ? x 0
0D id OR EAX, imm32 0--- xx ? x 0
0D iw OR AX, imm16 0--- xx ? x 0
0E PUSH CS ---- -- - - -
!! 0F 00 /0 SLDT r/m16 ---- -- - - -
!! 0F 00 /0 SLDT r/m32 ---- -- - - -
!! 0F 00 /1 STR r/m16 ---- -- - - -
!! 0F 00 /2 LLDT r/m16 ---- -- - - -
!! 0F 00 /3 LTR r/m16 ---- -- - - -
0F 00 /4 VERR r/m16 ---- -x - - -
0F 00 /5 VERW r/m16 ---- -x - - -
0F 00 /6 ---
0F 00 /7 ---
!! 0F 01 /0 SGDT m ---- -- - - -
!! 0F 01 /1 SIDT m ---- -- - - -
!! 0F 01 /2 LGDT m16&32 ---- -- - - -
!! 0F 01 /3 LIDT m16&32 ---- -- - - -
!! 0F 01 /4 SMSW r/m16 ---- -- - - -
0F 01 /5 ---
!! 0F 01 /6 LMSW r/m16 ---- -- - - -
!! 0F 01 /7 INVLPG m ---- -- - - -
!! 0F 02 /r LAR r16, r/m16 ---- -- - - -
!! 0F 02 /r LAR r32, r/m32 ---- -- - - -
!! 0F 03 /r LSL r16, r/m16 ---- -x - - -
!! 0F 03 /r LSL r16, r/m16 ---- -x - - -
!! 0F 03 /r LSL r32, r/m32 ---- -x - - -
!! 0F 03 /r LSL r32, r/m32 ---- -x - - -
0F 04 ---
0F 05 ---
!! 0F 06 CLTS ---- -- - - -
0F 07 ---
0F 08 INVD ---- -- - - -
0F 09 WBINVD ---- -- - - -
0F 0A ---
0F 0B ---
0F 0C ---
0F 0D ---
0F 0E ---
0F 0F ---
0F 10 ---
0F 11 ---
0F 12 ---
0F 13 ---
0F 14 ---
0F 15 ---
0F 16 ---
0F 17 ---
0F 18 ---
0F 19 ---
0F 1A ---
0F 1B ---
0F 1C ---
0F 1D ---
0F 1E ---
0F 1F ---
!! 0F 20 /r MOV r32, CR0-4 ?--- ?? ? ? ?
!! 0F 21 /r MOV r32, DR0-DR7 ?--- ?? ? ? ?
!! 0F 22 /r MOV CR0, r32 ?--- ?? ? ? ?
!! 0F 22 /r MOV CR2, r32 ?--- ?? ? ? ?
!! 0F 22 /r MOV CR3, r32 ?--- ?? ? ? ?
!! 0F 22 /r MOV CR4, r32 ?--- ?? ? ? ?
!! 0F 23 /r MOV DR0-DR7, r32 ?--- ?? ? ? ?
0F 24 ---
0F 25 ---
0F 26 ---
0F 27 ---
0F 28 ---
0F 29 ---
0F 2A ---
0F 2B ---
0F 2C ---
0F 2D ---
0F 2E ---
0F 2F ---
!! 0F 30 WRMSR ---- -- - - -
!! 0F 31 RDTSC ---- -- - - -
!! 0F 32 RDMSR ---- -- - - -
0F 33 ---
0F 34 ---
0F 35 ---
0F 36 ---
0F 37 ---
0F 38 ---
0F 39 ---
0F 3A ---
0F 3B ---
0F 3C ---
0F 3D ---
0F 3E ---
0F 3F ---
0F 40 ---
0F 41 ---
0F 42 ---
0F 43 ---
0F 44 ---
0F 45 ---
0F 46 ---
0F 47 ---
0F 48 ---
0F 49 ---
0F 4A ---
0F 4B ---
0F 4C ---
0F 4D ---
0F 4E ---
0F 4F ---
0F 50 ---
0F 51 ---
0F 52 ---
0F 53 ---
0F 54 ---
0F 55 ---
0F 56 ---
0F 57 ---
0F 58 ---
0F 59 ---
0F 5A ---
0F 5B ---
0F 5C ---
0F 5D ---
0F 5E ---
0F 5F ---
0F 60 ---
0F 61 ---
0F 62 ---
0F 63 ---
0F 64 ---
0F 65 ---
0F 66 ---
0F 67 ---
0F 68 ---
0F 69 ---
0F 6A ---
0F 6B ---
0F 6C ---
0F 6D ---
0F 6E ---
0F 6F ---
0F 70 ---
0F 71 ---
0F 72 ---
0F 73 ---
0F 74 ---
0F 75 ---
0F 76 ---
0F 77 ---
0F 78 ---
0F 79 ---
0F 7A ---
0F 7B ---
0F 7C ---
0F 7D ---
0F 7E ---
0F 7F ---
0F 80 cw/cd JO rel16/32 ---- -- - - -
0F 81 cw/cd JNO rel16/32 ---- -- - - -
0F 82 cw/cd JB rel16/32 ---- -- - - -
0F 82 cw/cd JC rel16/32 ---- -- - - -
0F 82 cw/cd JNAE rel16/32 ---- -- - - -
0F 83 cw/cd JAE rel16/32 ---- -- - - -
0F 83 cw/cd JNB rel16/32 ---- -- - - -
0F 83 cw/cd JNC rel16/32 ---- -- - - -
0F 84 cw/cd JE rel16/32 ---- -- - - -
0F 84 cw/cd JZ rel16/32 ---- -- - - -
0F 84 cw/cd JZ rel16/32 ---- -- - - -
0F 85 cw/cd JNE rel16/32 ---- -- - - -
0F 85 cw/cd JNZ rel16/32 ---- -- - - -
0F 86 cw/cd JBE rel16/32 ---- -- - - -
0F 86 cw/cd JNA rel16/32 ---- -- - - -
0F 87 cw/cd JA rel16/32 ---- -- - - -
0F 87 cw/cd JNBE rel16/32 ---- -- - - -
0F 88 cw/cd JS rel16/32 ---- -- - - -
0F 89 cw/cd JNS rel16/32 ---- -- - - -
0F 8A cw/cd JP rel16/32 ---- -- - - -
0F 8A cw/cd JPE rel16/32 ---- -- - - -
0F 8B cw/cd JNP rel16/32 ---- -- - - -
0F 8B cw/cd JPO rel16/32 ---- -- - - -
0F 8C cw/cd JL rel16/32 ---- -- - - -
0F 8C cw/cd JNGE rel16/32 ---- -- - - -
0F 8D cw/cd JGE rel16/32 ---- -- - - -
0F 8D cw/cd JNL rel16/32 ---- -- - - -
0F 8E cw/cd JLE rel16/32 ---- -- - - -
0F 8E cw/cd JNG rel16/32 ---- -- - - -
0F 8F cw/cd JG rel16/32 ---- -- - - -
0F 8F cw/cd JNLE rel16/32 ---- -- - - -
0F 90 SETO r/m8 ---- -- - - -
0F 91 SETNO r/m8 ---- -- - - -
0F 92 SETB r/m8 ---- -- - - -
0F 92 SETC r/m8 ---- -- - - -
0F 92 SETNAE r/m8 ---- -- - - -
0F 93 SETAE r/m8 ---- -- - - -
0F 93 SETNB r/m8 ---- -- - - -
0F 93 SETNC r/m8 ---- -- - - -
0F 94 SETE r/m8 ---- -- - - -
0F 94 SETZ r/m8 ---- -- - - -
0F 95 SETNE r/m8 ---- -- - - -
0F 95 SETNZ r/m8 ---- -- - - -
0F 96 SETBE r/m8 ---- -- - - -
0F 96 SETNA r/m8 ---- -- - - -
0F 97 SETA r/m8 ---- -- - - -
0F 97 SETNBE r/m8 ---- -- - - -
0F 98 SETS r/m8 ---- -- - - -
0F 99 SETNS r/m8 ---- -- - - -
0F 9A SETP r/m8 ---- -- - - -
0F 9A SETPE r/m8 ---- -- - - -
0F 9B SETNP r/m8 ---- -- - - -
0F 9B SETPO r/m8 ---- -- - - -
0F 9C SETL r/m8 ---- -- - - -
0F 9C SETNGE r/m8 ---- -- - - -
0F 9D SETGE r/m8 ---- -- - - -
0F 9D SETNL r/m8 ---- -- - - -
0F 9E SETLE r/m8 ---- -- - - -
0F 9E SETNG r/m8 ---- -- - - -
0F 9F SETG r/m8 ---- -- - - -
0F 9F SETNLE r/m8 ---- -- - - -
0F A0 PUSH FS ---- -- - - -
0F A1 POP FS ---- -- - - -
0F A2 CPUID ---- -- - - -
0F A3 BT r/m16, r16 ---- -- - - x
0F A3 BT r/m32, r32 ---- -- - - x
0F A4 SHLD r/m16, r16, imm8 ?--- xx ? x x
0F A4 SHLD r/m32, r32, imm8 ?--- xx ? x x
0F A5 SHLD r/m16, r16, CL ?--- xx ? x x
0F A5 SHLD r/m32, r32, CL ?--- xx ? x x
0F A8 PUSH GS ---- -- - - -
0F A9 POP GS ---- -- - - -
!! 0F AA RSM xxxx xx x x x
0F AB BTS r/m16, r16 ---- -- - - x
0F AB BTS r/m32, r32 ---- -- - - x
0F AC SHRD r/m16, r16, imm8 ?--- xx ? x x
0F AC SHRD r/m32, r32, imm8 ?--- xx ? x x
0F AD SHRD r/m16, r16, CL ?--- xx ? x x
0F AD SHRD r/m32, r32, CL ?--- xx ? x x
0F AE ---
0F AF /r IMUL r16, r/m16 x--- ?? ? ? x
0F AF /r IMUL r32, r/m32 x--- ?? ? ? x
0F B0 /r CMPXCHG r/m8, r8 x--- xx x x x
0F B1 /r CMPXCHG r/m16, r16 x--- xx x x x
0F B1 /r CMPXCHG r/m32, r32 x--- xx x x x
0F B2 /r LSS r16, m16:16 ---- -- - - -
0F B2 /r LSS r32, m16:32 ---- -- - - -
0F B3 BTR r/m16, r16 ---- -- - - x
0F B3 BTR r/m32, r32 ---- -- - - x
0F B4 /r LFS r16, m16:16 ---- -- - - -
0F B4 /r LFS r32, m16:32 ---- -- - - -
0F B5 /r LGS r16, m16:16 ---- -- - - -
0F B5 /r LGS r32, m16:32 ---- -- - - -
0F B6 /r MOVZX r16, r/m8 ---- -- - - -
0F B6 /r MOVZX r32, r/m8 ---- -- - - -
0F B7 /r MOVZX r32, r/m16 ---- -- - - -
0F B8 ---
0F B9 ---
0F BA /0 ---
0F BA /1 ---
0F BA /2 ---
0F BA /3 ---
0F BA /4 ib BT r/m16, imm8 ---- -- - - x
0F BA /4 ib BT r/m32, imm8 ---- -- - - x
0F BA /5 ib BTS r/m16, imm8 ---- -- - - x
0F BA /5 ib BTS r/m32, imm8 ---- -- - - x
0F BA /6 ib BTR r/m16, imm8 ---- -- - - x
0F BA /6 ib BTR r/m32, imm8 ---- -- - - x
0F BA /7 ib BTC r/m16, imm8 ---- -- - - x
0F BA /7 ib BTC r/m32, imm8 ---- -- - - x
0F BB BTC r/m16, r16 ---- -- - - x
0F BB BTC r/m32, r32 ---- -- - - x
0F BC BSF r16, r/m16 ?--- ?x ? ? ?
0F BC BSF r32, r/m32 ?--- ?x ? ? ?
0F BD BSR r16, r/m16 ?--- ?x ? ? ?
0F BD BSR r32, r/m32 ?--- ?x ? ? ?
0F BE /r MOVSX r16, r/m8 ---- -- - - -
0F BE /r MOVSX r32, r/m8 ---- -- - - -
0F BF /r MOVSX r32, r/m16 ---- -- - - -
0F C0 /r XADD r/m8, r8 x--- xx x x x
0F C1 /r XADD r/m16, r16 x--- xx x x x
0F C1 /r XADD r/m32, r32 x--- xx x x x
0F C2 ---
0F C3 ---
0F C4 ---
0F C5 ---
0F C6 ---
0F C7 /0 ---
0F C7 /1 m64 CMPXCHG8B r/m64 ---- -x - - -
0F C7 /2 ---
0F C7 /3 ---
0F C7 /4 ---
0F C7 /5 ---
0F C7 /6 ---
0F C7 /7 ---
0F C8 BSWAP EAX ---- -- - - -
0F C9 BSWAP ECX ---- -- - - -
0F CA BSWAP EDX ---- -- - - -
0F CB BSWAP EBX ---- -- - - -
0F CC BSWAP ESP ---- -- - - -
0F CD BSWAP EBP ---- -- - - -
0F CE BSWAP ESI ---- -- - - -
0F CF BSWAP EDI ---- -- - - -
10 /r ADC r/m8, r8 x--- xx x x x
11 /r ADC r/m16, r16 x--- xx x x x
11 /r ADC r/m32, r32 x--- xx x x x
12 /r ADC r8, r/m8 x--- xx x x x
13 /r ADC r16, r/m16 x--- xx x x x
13 /r ADC r32, r/m32 x--- xx x x x
14 ib ADC AL, imm8 x--- xx x x x
15 id ADC EAX, imm32 x--- xx x x x
15 iw ADC AX, imm16 x--- xx x x x
16 PUSH SS ---- -- - - -
17 POP SS ---- -- - - -
18 /r SBB r/m8, r8 x--- xx x x x
19 /r SBB r/m16, r16 x--- xx x x x
19 /r SBB r/m32, r32 x--- xx x x x
1A /r SBB r8, r/m8 x--- xx x x x
1B /r SBB r16, r/m16 x--- xx x x x
1B /r SBB r32, r/m32 x--- xx x x x
1C ib SBB AL, imm8 x--- xx x x x
1D id SBB EAX, imm32 x--- xx x x x
1D iw SBB AX, imm16 x--- xx x x x
1E PUSH DS ---- -- - - -
1F POP DS ---- -- - - -
20 /r AND r/m8, r8 0--- xx ? x 0
21 /r AND r/m16, r16 0--- xx ? x 0
21 /r AND r/m32, r32 0--- xx ? x 0
22 /r AND r8, r/m8 0--- xx ? x 0
23 /r AND r16, r/m16 0--- xx ? x 0
23 /r AND r32, r/m32 0--- xx ? x 0
24 ib AND AL, imm8 0--- xx ? x 0
25 id AND EAX, imm32 0--- xx ? x 0
25 iw AND AX, imm16 0--- xx ? x 0
++ 26 ES: prefix
27 DAA ?--- xx x x x
28 /r SUB r/m8, r8 x--- xx x x x
29 /r SUB r/m16, r16 x--- xx x x x
29 /r SUB r/m32, r32 x--- xx x x x
2A /r SUB r8, r/m8 x--- xx x x x
2B /r SUB r16, r/m16 x--- xx x x x
2B /r SUB r32, r/m32 x--- xx x x x
2C ib SUB AL, imm8 x--- xx x x x
2D id SUB EAX, imm32 x--- xx x x x
2D iw SUB AX, imm16 x--- xx x x x
++ 2E CS: prefix
2F DAS ?--- xx x x x
30 /r XOR r/m8, r8 x--- xx x x 0
31 /r XOR r/m16, r16 x--- xx x x 0
31 /r XOR r/m32, r32 x--- xx x x 0
32 /r XOR r8, r/m8 x--- xx x x 0
33 /r XOR r16, r/m16 x--- xx x x 0
33 /r XOR r32, r/m32 x--- xx x x 0
34 ib XOR AL, imm8 x--- xx x x 0
35 id XOR EAX, imm32 x--- xx x x 0
35 iw XOR AX, imm16 x--- xx x x 0
++ 36 SS: prefix
37 AAA ?--- ?? x ? x
38 /r CMP r/m8, r8 x--- xx x x x
39 /r CMP r/m16, r16 x--- xx x x x
39 /r CMP r/m32, r32 x--- xx x x x
3A /r CMP r8, r/m8 x--- xx x x x
3B /r CMP r16, r/m16 x--- xx x x x
3B /r CMP r32, r/m32 x--- xx x x x
3C ib CMP AL, imm8 x--- xx x x x
3D id CMP EAX, imm32 x--- xx x x x
3D iw CMP AX, imm16 x--- xx x x x
++ 3E DS: prefix
3F AAS ?--- ?? x ? x
40 INC eAX x--- xx x x -
41 INC eCX x--- xx x x -
42 INC eDX x--- xx x x -
43 INC eBX x--- xx x x -
44 INC eSP x--- xx x x -
45 INC eBP x--- xx x x -
46 INC eSI x--- xx x x -
47 INC eDI x--- xx x x -
48 DEC eAX x--- xx x x -
49 DEC eCX x--- xx x x -
4A DEC eDX x--- xx x x -
4B DEC eBX x--- xx x x -
4C DEC eSP x--- xx x x -
4D DEC eBP x--- xx x x -
4E DEC eSI x--- xx x x -
4F DEC eDI x--- xx x x -
50 PUSH eAX ---- -- - - -
51 PUSH eCX ---- -- - - -
52 PUSH eDX ---- -- - - -
53 PUSH eBX ---- -- - - -
54 PUSH eSP ---- -- - - -
55 PUSH eBP ---- -- - - -
56 PUSH eSI ---- -- - - -
57 PUSH eDI ---- -- - - -
58 POP eAX ---- -- - - -
59 POP eCX ---- -- - - -
5A POP eDX ---- -- - - -
5B POP eBX ---- -- - - -
5C POP eSP ---- -- - - -
5D POP eBP ---- -- - - -
5E POP eSI ---- -- - - -
5F POP eDI ---- -- - - -
60 PUSHA ---- -- - - -
60 PUSHAD ---- -- - - -
61 POPA ---- -- - - -
61 POPAD ---- -- - - -
!! 62 /r BOUND r16, m16&16 ---- -- - - -
!! 62 /r BOUND r32, m32&32 ---- -- - - -
!! 63 /r ARPL r/m16, r16 ---- -x - - -
++ 64 FS: prefix
++ 65 GS: prefix
++ 66 Operand-size prefix
++ 67 Address-size prefix
68 PUSH imm16 ---- -- - - -
68 PUSH imm32 ---- -- - - -
69 /r id IMUL r32, imm32 x--- ?? ? ? x
69 /r id IMUL r32, r/m32, imm32 x--- ?? ? ? x
69 /r iw IMUL r16, imm16 x--- ?? ? ? x
69 /r iw IMUL r16, r/m16, imm16 x--- ?? ? ? x
6A PUSH imm8 ---- -- - - -
6B /r ib IMUL r16, imm8 x--- ?? ? ? x
6B /r ib IMUL r16, r/m16, imm8 x--- ?? ? ? x
6B /r ib IMUL r32, imm8 x--- ?? ? ? x
6B /r ib IMUL r32, r/m32, imm8 x--- ?? ? ? x
6C INSB ---- -- - - -
6D INSD ---- -- - - -
6D INSW ---- -- - - -
6E OUTSB ---- -- - - -
6F OUTSW ---- -- - - -
6F OUTSD ---- -- - - -
70 cb JO rel8 ---- -- - - -
71 cb JNO rel8 ---- -- - - -
72 cb JB rel8 ---- -- - - -
72 cb JC rel8 ---- -- - - -
72 cb JNAE rel8 ---- -- - - -
73 cb JAE rel8 ---- -- - - -
73 cb JNB rel8 ---- -- - - -
73 cb JNC rel8 ---- -- - - -
74 cb JE rel8 ---- -- - - -
74 cb JZ rel8 ---- -- - - -
75 cb JNE rel8 ---- -- - - -
75 cb JNZ rel8 ---- -- - - -
76 cb JBE rel8 ---- -- - - -
76 cb JNA rel8 ---- -- - - -
77 cb JA rel8 ---- -- - - -
77 cb JNBE rel8 ---- -- - - -
78 cb JS rel8 ---- -- - - -
79 cb JNS rel8 ---- -- - - -
7A cb JP rel8 ---- -- - - -
7A cb JPE rel8 ---- -- - - -
7B cb JNP rel8 ---- -- - - -
7B cb JPO rel8 ---- -- - - -
7C cb JL rel8 ---- -- - - -
7C cb JNGE rel8 ---- -- - - -
7D cb JGE rel8 ---- -- - - -
7D cb JNL rel8 ---- -- - - -
7E cb JLE rel8 ---- -- - - -
7E cb JNG rel8 ---- -- - - -
7F cb JG rel8 ---- -- - - -
7F cb JNLE rel8 ---- -- - - -
80 /0 ib ADD r/m8, imm8 x--- xx x x x
80 /1 ib OR r/m8, imm8 0--- xx ? x 0
80 /2 ib ADC r/m8, imm8 x--- xx x x x
80 /3 ib SBB r/m8, imm8 x--- xx x x x
80 /4 ib AND r/m8, imm8 0--- xx ? x 0
80 /5 ib SUB r/m8, imm8 x--- xx x x x
80 /6 ib XOR r/m8, imm8 x--- xx x x 0
80 /7 ib CMP r/m8, imm8 x--- xx x x x
81 /0 id ADD r/m32, imm32 x--- xx x x x
81 /0 iw ADD r/m16, imm16 x--- xx x x x
81 /1 id OR r/m32, imm32 0--- xx ? x 0
81 /1 iw OR r/m16, imm16 0--- xx ? x 0
81 /2 id ADC r/m32, imm32 x--- xx x x x
81 /2 iw ADC r/m16, imm16 x--- xx x x x
81 /3 id SBB r/m32, imm32 x--- xx x x x
81 /3 iw SBB r/m16, imm16 x--- xx x x x
81 /4 id AND r/m32, imm32 0--- xx ? x 0
81 /4 iw AND r/m16, imm16 0--- xx ? x 0
81 /5 id SUB r/m32, imm32 x--- xx x x x
81 /5 iw SUB r/m16, imm16 x--- xx x x x
81 /6 id XOR r/m32, imm32 x--- xx x x 0
81 /6 iw XOR r/m16, imm16 x--- xx x x 0
81 /7 id CMP r/m32, imm32 x--- xx x x x
81 /7 iw CMP r/m16, imm16 x--- xx x x x
~~ 82 /0 ib ADD r/m8, imm8 x--- xx x x x
82 /1 ib ---
~~ 82 /2 ib ADC r/m8, imm8 x--- xx x x x
~~ 82 /3 ib SBB r/m8, imm8 x--- xx x x x
82 /4 ib ---
~~ 82 /5 ib SUB r/m8, imm8 x--- xx x x x
82 /6 ib ---
~~ 82 /7 ib CMP r/m8, imm8 x--- xx x x x
83 /0 ib ADD r/m16, imm8 x--- xx x x x
83 /0 ib ADD r/m32, imm8 x--- xx x x x
83 /1 ib OR r/m16, imm8 0--- xx ? x 0
83 /1 ib OR r/m32, imm8 0--- xx ? x 0
83 /2 ib ADC r/m16, imm8 x--- xx x x x
83 /2 ib ADC r/m32, imm8 x--- xx x x x
83 /3 ib SBB r/m16, imm8 x--- xx x x x
83 /3 ib SBB r/m32, imm8 x--- xx x x x
83 /4 ib AND r/m16, imm8 0--- xx ? x 0
83 /4 ib AND r/m32, imm8 0--- xx ? x 0
83 /5 ib SUB r/m16, imm8 x--- xx x x x
83 /5 ib SUB r/m32, imm8 x--- xx x x x
83 /6 ib XOR r/m16, imm8 x--- xx x x 0
83 /6 ib XOR r/m32, imm8 x--- xx x x 0
83 /7 ib CMP r/m16, imm8 x--- xx x x x
83 /7 ib CMP r/m32, imm8 x--- xx x x x
84 /r TEST r/m8, r8 0--- xx ? x 0
85 /r TEST r/m16, r16 0--- xx ? x 0
85 /r TEST r/m32, r32 0--- xx ? x 0
86 /r XCHG r/m8, r8 ---- -- - - -
86 /r XCHG r8, r/m8 ---- -- - - -
87 /r XCHG r/m16, r16 ---- -- - - -
87 /r XCHG r/m32, r32 ---- -- - - -
87 /r XCHG r16, r/m16 ---- -- - - -
87 /r XCHG r32, r/m32 ---- -- - - -
88 /r MOV r/m8, r8 ---- -- - - -
89 /r MOV r/m16, r16 ---- -- - - -
89 /r MOV r/m32, r32 ---- -- - - -
8A /r MOV r8, r/m8 ---- -- - - -
8B /r MOV r16, r/m16 ---- -- - - -
8B /r MOV r32, r/m32 ---- -- - - -
8C /0 MOV r/m16, ES ---- -- - - -
8C /1 MOV r/m16, CS ---- -- - - -
8C /2 MOV r/m16, SS ---- -- - - -
8C /3 MOV r/m16, DS ---- -- - - -
8C /4 MOV r/m16, FS ---- -- - - -
8C /5 MOV r/m16, GS ---- -- - - -
8C /6 ---
8C /7 ---
8D /r LEA r16, m ---- -- - - -
8D /r LEA r32, m ---- -- - - -
8E /0 MOV ES, r/m16 ---- -- - - -
8E /1 MOV CS, r/m16 ---- -- - - -
8E /2 MOV SS, r/m16 ---- -- - - -
8E /3 MOV DS, r/m16 ---- -- - - -
8E /4 MOV FS, r/m16 ---- -- - - -
8E /5 MOV GS, r/m16 ---- -- - - -
8E /6 ---
8E /7 ---
8F /0 POP m16 ---- -- - - -
8F /0 POP m32 ---- -- - - -
8F /1 ---
8F /2 ---
8F /3 ---
8F /4 ---
8F /5 ---
8F /6 ---
8F /7 ---
90 NOP = XCHG eAX, eAX ---- -- - - -
91 XCHG eAX, eCX ---- -- - - -
92 XCHG eAX, eDX ---- -- - - -
93 XCHG eAX, eBX ---- -- - - -
94 XCHG eAX, eSP ---- -- - - -
95 XCHG eAX, eBP ---- -- - - -
96 XCHG eAX, eSI ---- -- - - -
97 XCHG eAX, eDI ---- -- - - -
98 CBW ---- -- - - -
98 CWDE ---- -- - - -
99 CDQ ---- -- - - -
99 CWD ---- -- - - -
9A cd CALL ptr16:16 ---- -- - - -
9A cp CALL ptr16:32 ---- -- - - -
9B FWAIT ---- -- - - -
9B WAIT ---- -- - - -
9B D9 /6 FSTENV m14/28byte ---- -- - - -
9B D9 /7 FSTCW m2byte ---- -- - - -
9B DB E2 FCLEX ---- -- - - -
9B DB E3 FINIT ---- -- - - -
9B DD /6 FSAVE m94/108byte ---- -- - - -
9B DD /7 FSTSW m2byte ---- -- - - -
9B DF E0 FSTSW AX ---- -- - - -
9C PUSHF ---- -- - - -
9C PUSHFD ---- -- - - -
9D POPF xxxx xx x x x
9D POPFD xxxx xx x x x
9E SAHF ---- xx x x x
9F LAHF ---- -- - - -
A0 MOV AL, moffs8 ---- -- - - -
A1 MOV AX, moffs16 ---- -- - - -
A1 MOV EAX, moffs32 ---- -- - - -
A2 MOV moffs8, AL ---- -- - - -
A3 MOV moffs16, AX ---- -- - - -
A3 MOV moffs32, EAX ---- -- - - -
A4 MOVSB ---- -- - - -
A5 MOVSW ---- -- - - -
A5 MOVSD ---- -- - - -
A6 CMPSB x--- xx x x x
A7 CMPSD x--- xx x x x
A7 CMPSW x--- xx x x x
A8 ib TEST AL, imm8 0--- xx ? x 0
A9 id TEST EAX, imm32 0--- xx ? x 0
A9 iw TEST AX, imm16 0--- xx ? x 0
AA STOSB ---- -- - - -
AB STOSW ---- -- - - -
AB STOSD ---- -- - - -
AC LODSB ---- -- - - -
AD LODSD ---- -- - - -
AD LODSW ---- -- - - -
AE SCASB x--- xx x x x
AF SCASW x--- xx x x x
AF SCASD x--- xx x x x
B0 MOV AL, imm8 ---- -- - - -
B1 MOV CL, imm8 ---- -- - - -
B2 MOV DL, imm8 ---- -- - - -
B3 MOV BL, imm8 ---- -- - - -
B4 MOV AH, imm8 ---- -- - - -
B5 MOV CH, imm8 ---- -- - - -
B6 MOV DH, imm8 ---- -- - - -
B7 MOV BH, imm8 ---- -- - - -
B8 MOV eAX, imm16/32 ---- -- - - -
B9 MOV eCX, imm16/32 ---- -- - - -
BA MOV eDX, imm16/32 ---- -- - - -
BB MOV eBX, imm16/32 ---- -- - - -
BC MOV eSP, imm16/32 ---- -- - - -
BD MOV eBP, imm16/32 ---- -- - - -
BE MOV eSI, imm16/32 ---- -- - - -
BF MOV eDI, imm16/32 ---- -- - - -
C0 /0 ib ROL r/m8, imm8 x--- -- - - x
C0 /1 ib ROR r/m8, imm8 x--- -- - - x
C0 /2 ib RCL r/m8, imm8 x--- -- - - x
C0 /3 ib RCR r/m8, imm8 x--- -- - - x
C0 /4 ib SAL r/m8, imm8 x--- xx ? x x
C0 /4 ib SHL r/m8, imm8 x--- xx ? x x
C0 /5 ib SHR r/m8, imm8 x--- xx ? x x
?? C0 /6 ib SAL r/m8, imm8 x--- xx ? x x
C0 /7 ib SAR r/m8, imm8 x--- xx ? x x
C1 /0 ib ROL r/m16, imm8 x--- -- - - x
C1 /0 ib ROL r/m32, imm8 x--- -- - - x
C1 /1 ib ROR r/m16, imm8 x--- -- - - x
C1 /1 ib ROR r/m32, imm8 x--- -- - - x
C1 /2 ib RCL r/m16, imm8 x--- -- - - x
C1 /2 ib RCL r/m32, imm8 x--- -- - - x
C1 /3 ib RCR r/m16, imm8 x--- -- - - x
C1 /3 ib RCR r/m32, imm8 x--- -- - - x
C1 /4 ib SAL r/m16, imm8 x--- xx ? x x
C1 /4 ib SAL r/m32, imm8 x--- xx ? x x
C1 /4 ib SHL r/m16, imm8 x--- xx ? x x
C1 /4 ib SHL r/m32, imm8 x--- xx ? x x
C1 /5 ib SHR r/m16, imm8 x--- xx ? x x
C1 /5 ib SHR r/m32, imm8 x--- xx ? x x
?? C1 /6 ib SAL r/m16, imm8 x--- xx ? x x
?? C1 /6 ib SAL r/m32, imm8 x--- xx ? x x
C1 /7 ib SAR r/m16, imm8 x--- xx ? x x
C1 /7 ib SAR r/m32, imm8 x--- xx ? x x
C2 iw RET imm16 ---- -- - - -
C3 RET ---- -- - - -
C4 /r LES r16, m16:16 ---- -- - - -
C4 /r LES r32, m16:32 ---- -- - - -
C5 /r LDS r16, m16:16 ---- -- - - -
C5 /r LDS r32, m16:32 ---- -- - - -
C6 /0 MOV r/m8, imm8 ---- -- - - -
C6 /1 ---
C6 /2 ---
C6 /3 ---
C6 /4 ---
C6 /5 ---
C6 /6 ---
C6 /7 ---
C7 /0 MOV r/m16, imm16 ---- -- - - -
C7 /0 MOV r/m32, imm32 ---- -- - - -
C7 /1 ---
C7 /2 ---
C7 /3 ---
C7 /4 ---
C7 /5 ---
C7 /6 ---
C7 /7 ---
C8 iw ib ENTER imm16, imm8 ---- -- - - -
C9 LEAVE ---- -- - - -
CA iw RET imm16 ---- -- - - -
CB RET ---- -- - - -
CB RET ---- -- - - -
CC INT ---- -- - - -
CD ib INT imm8 ---- -- - - -
CE INTO ---- -- - - -
CF IRET xxxx xx x x x
CF IRETD xxxx xx x x x
D0 /0 ROL r/m8, 1 x--- -- - - x
D0 /1 ROR r/m8, 1 x--- -- - - x
D0 /2 RCL r/m8, 1 x--- -- - - x
D0 /3 RCR r/m8, 1 x--- -- - - x
D0 /4 SAL r/m8, 1 x--- xx ? x x
D0 /4 SHL r/m8, 1 x--- xx ? x x
D0 /5 SHR r/m8, 1 x--- xx ? x x
?? D0 /6 SAL r/m8, 1 x--- xx ? x x
D0 /7 SAR r/m8, 1 x--- xx ? x x
D1 /0 ROL r/m16, 1 x--- -- - - x
D1 /0 ROL r/m32, 1 x--- -- - - x
D1 /1 ROR r/m16, 1 x--- -- - - x
D1 /1 ROR r/m32, 1 x--- -- - - x
D1 /2 RCL r/m16, 1 x--- -- - - x
D1 /2 RCL r/m32, 1 x--- -- - - x
D1 /3 RCR r/m16, 1 x--- -- - - x
D1 /3 RCR r/m32, 1 x--- -- - - x
D1 /4 SAL r/m16, 1 x--- xx ? x x
D1 /4 SAL r/m32, 1 x--- xx ? x x
D1 /4 SHL r/m16, 1 x--- xx ? x x
D1 /4 SHL r/m32, 1 x--- xx ? x x
D1 /5 SHR r/m16, 1 x--- xx ? x x
D1 /5 SHR r/m32, 1 x--- xx ? x x
?? D1 /6 SAL r/m16, 1 x--- xx ? x x
?? D1 /6 SAL r/m32, 1 x--- xx ? x x
D1 /7 SAR r/m16, 1 x--- xx ? x x
D1 /7 SAR r/m32, 1 x--- xx ? x x
D2 /0 ROL r/m8, CL x--- -- - - x
D2 /1 ROR r/m8, CL x--- -- - - x
D2 /2 RCL r/m8, CL x--- -- - - x
D2 /3 RCR r/m8, CL x--- -- - - x
D2 /4 SAL r/m8, CL x--- xx ? x x
D2 /4 SHL r/m8, CL x--- xx ? x x
D2 /5 SHR r/m8, CL x--- xx ? x x
?? D2 /6 SAL r/m8, CL x--- xx ? x x
D2 /7 SAR r/m8, CL x--- xx ? x x
D3 /0 ROL r/m16, CL x--- -- - - x
D3 /0 ROL r/m32, CL x--- -- - - x
D3 /1 ROR r/m16, CL x--- -- - - x
D3 /1 ROR r/m32, CL x--- -- - - x
D3 /2 RCL r/m16, CL x--- -- - - x
D3 /2 RCL r/m32, CL x--- -- - - x
D3 /3 RCR r/m16, CL x--- -- - - x
D3 /3 RCR r/m32, CL x--- -- - - x
D3 /4 SAL r/m16, CL x--- xx ? x x
D3 /4 SAL r/m32, CL x--- xx ? x x
D3 /4 SHL r/m16, CL x--- xx ? x x
D3 /4 SHL r/m32, CL x--- xx ? x x
D3 /5 SHR r/m16, CL x--- xx ? x x
D3 /5 SHR r/m32, CL x--- xx ? x x
?? D3 /6 SAL r/m16, CL x--- xx ? x x
?? D3 /6 SAL r/m32, CL x--- xx ? x x
D3 /7 SAR r/m16, CL x--- xx ? x x
D3 /7 SAR r/m32, CL x--- xx ? x x
D4 0A AAM ?--- xx ? x ?
D4 ib AAM imm8 ?--- xx ? x ?
D5 0A AAD ?--- xx ? x ?
D5 ib AAD imm8 ?--- xx ? x ?
// D6 SALC ---- -- - - -
D7 XLATB ---- -- - - -
D8 /0 FADD m32 real ---- -- - - -
D8 /1 FMUL m32real ---- -- - - -
D8 /2 FCOM m32real ---- -- - - -
D8 /3 FCOMP m32real ---- -- - - -
D8 /4 FSUB m32real ---- -- - - -
D8 /5 FSUBR m32real ---- -- - - -
D8 /6 FDIV m32real ---- -- - - -
D8 /7 FDIVR m32real ---- -- - - -
D8 C0+i FADD ST, ST(i) ---- -- - - -
D8 C8+i FMUL ST, ST(i) ---- -- - - -
D8 D0+i FCOM ST(i) ---- -- - - -
D8 D1 FCOM ---- -- - - -
D8 D8+i FCOMP ST(i) ---- -- - - -
D8 D9 FCOMP ---- -- - - -
D8 E0+i FSUB ST, ST(i) ---- -- - - -
D8 E8+i FSUBR ST, ST(i) ---- -- - - -
D8 F0+i FDIV ST, ST(i) ---- -- - - -
D8 F8+i FDIVR ST, ST(i) ---- -- - - -
D9 /0 FLD m32real ---- -- - - -
D9 /1 ---
D9 /2 FST m32real ---- -- - - -
D9 /3 FSTP m32real ---- -- - - -
D9 /4 FLDENV m14/28byte ---- -- - - -
D9 /5 FNLDCW m2byte ---- -- - - -
D9 /6 FNSTENV m14/28byte ---- -- - - -
D9 /7 FNSTCW m2byte ---- -- - - -
D9 C0+i FLD ST(i) ---- -- - - -
D9 C8+i FXCH ST(i) ---- -- - - -
D9 C9 FXCH ---- -- - - -
D9 D0 FNOP ---- -- - - -
D9 E0 FCHS ---- -- - - -
D9 E1 FABS ---- -- - - -
D9 E2 ---
D9 E3 ---
D9 E4 FTST ---- -x - x x
D9 E5 FXAM ---- -x - x x
D9 E6 ---
D9 E7 ---
D9 E8 FLD1 ---- -- - - -
D9 E9 FLDL2T ---- -- - - -
D9 EA FLDL2E ---- -- - - -
D9 EB FLDPI ---- -- - - -
D9 EC FLDLG2 ---- -- - - -
D9 ED FLDLN2 ---- -- - - -
D9 EE FLDZ ---- -- - - -
D9 EF ---
D9 F0 F2XM1 ---- -- - - -
D9 F1 FYL2X ---- -- - - -
D9 F2 FPTAN ---- -- - - -
D9 F3 FPATAN ---- -- - - -
D9 F4 FXTRACT ---- -- - - -
D9 F5 FPREM1 ---- -- - - -
D9 F6 FDECSTP ---- -- - - -
D9 F7 FINCSTP ---- -- - - -
D9 F8 FPREM ---- -- - - -
D9 F9 FYL2XP1 ---- -- - - -
D9 FA FSQRT ---- -- - - -
D9 FB FSINCOS ---- -- - - -
D9 FC FRNDINT ---- -- - - -
D9 FD FSCALE ---- -- - - -
D9 FE FSIN ---- -- - - -
D9 FF FCOS ---- -- - - -
DA /0 FIADD m32int ---- -- - - -
DA /1 FIMUL m32int ---- -- - - -
DA /2 FICOM m32int ---- -x - x x
DA /3 FICOMP m32int ---- -x - x x
DA /4 FISUB m32int ---- -- - - -
DA /5 FISUBR m32int ---- -- - - -
DA /6 FIDIV m32int ---- -- - - -
DA /7 FIDIVR m32int ---- -- - - -
DA E9 FUCOMPP ---- -x - x x
DB /0 FILD m32int ---- -- - - -
DB /1 ---
DB /2 FIST m32int ---- -- - - -
DB /3 FISTP m32int ---- -- - - -
DB /5 FLD m80real ---- -- - - -
DB /6 ---
DB /7 FSTP m80real ---- -- - - -
DB E2 FNCLEX ---- -- - - -
DB E3 FNINIT ---- -- - - -
DC /0 FADD m64real ---- -- - - -
DC /1 FMUL m64real ---- -- - - -
DC /2 FCOM m64real ---- -- - - -
DC /3 FCOMP m64real ---- -- - - -
DC /4 FSUB m64real ---- -- - - -
DC /5 FSUBR m64real ---- -- - - -
DC /6 FDIV m64real ---- -- - - -
DC /7 FDIVR m64real ---- -- - - -
DC C0+i FADD ST(i), ST ---- -- - - -
DC C8+i FMUL ST(i), ST ---- -- - - -
DC E0+i FSUBR ST(i), ST ---- -- - - -
DC E8+i FSUB ST(i), ST ---- -- - - -
DC F0+i FDIVR ST(i), ST ---- -- - - -
DC F8+i FDIV ST(i), ST ---- -- - - -
DD /0 FLD m64real ---- -- - - -
DD /1 ---
DD /2 FST m64real ---- -- - - -
DD /3 FSTP m64real ---- -- - - -
DD /4 FRSTOR m94/108byte ---- -- - - -
DD /5 ---
DD /6 FNSAVE m94/108byte ---- -- - - -
DD /7 FNSTSW m2byte ---- -- - - -
DD C0+i FFREE ST(i) ---- -- - - -
DD D0+i FST ST(i) ---- -- - - -
DD D8+i FSTP ST(i) ---- -- - - -
DD E0+i FUCOM ST(i) ---- -x - x x
DD E1 FUCOM ---- -x - x x
DD E8+i FUCOMP ST(i) ---- -x - x x
DD E9 FUCOMP ---- -x - x x
DE /0 FIADD m16int ---- -- - - -
DE /1 FIMUL m16int ---- -- - - -
DE /2 FICOM m16int ---- -x - x x
DE /3 FICOMP m16int ---- -x - x x
DE /4 FISUB m16int ---- -- - - -
DE /5 FISUBR m16int ---- -- - - -
DE /6 FIDIV m16int ---- -- - - -
DE /7 FIDIVR m16int ---- -- - - -
DE C0+i FADDP ST(i), ST ---- -- - - -
DE C1 FADDP 3/1 ---- -- - - -
DE C8+i FMULP ST(i), ST ---- -- - - -
DE C9 FMULP ---- -- - - -
DE D9 FCOMPP ---- -- - - -
DE E0+i FSUBRP ST(i), ST ---- -- - - -
DE E1 FSUBRP ---- -- - - -
DE E8+i FSUBP ST(i), ST ---- -- - - -
DE E9 FSUBP ---- -- - - -
DE F0+i FDIVRP ST(i), ST ---- -- - - -
DE F1 FDIVRP ---- -- - - -
DE F8+i FDIVP ST(i), ST ---- -- - - -
DE F9 FDIVP ---- -- - - -
DF /0 FILD m16int ---- -- - - -
DF /1 ---
DF /2 FIST m16int ---- -- - - -
DF /3 FISTP m16int ---- -- - - -
DF /4 FBLD m80 ---- -- - - -
DF /5 FILD m64int ---- -- - - -
DF /6 FBSTP m80dec ---- -- - - -
DF /7 FISTP m64int ---- -- - - -
DF E0 FNSTSW AX ---- -- - - -
E0 cb LOOPNE rel8 ---- -- - - -
E0 cb LOOPNZ rel8 ---- -- - - -
E1 cb LOOPE rel8 ---- -- - - -
E1 cb LOOPZ rel8 ---- -- - - -
E2 cb LOOP rel8 ---- -- - - -
E3 cb JCXZ rel8 ---- -- - - -
E3 cb JECXZ rel8 ---- -- - - -
E4 ib IN AL, imm8 ---- -- - - -
E5 ib IN AX, imm8 ---- -- - - -
E5 ib IN EAX, imm8 ---- -- - - -
E6 ib OUT imm8, AL ---- -- - - -
E7 ib OUT imm8, AX ---- -- - - -
E7 ib OUT imm8, EAX ---- -- - - -
E8 cd CALL rel32 ---- -- - - -
E8 cw CALL rel16 ---- -- - - -
E9 cd JMP rel32 ---- -- - - -
E9 cw JMP rel16 ---- -- - - -
EA cd JMP ptr16:16 ---- -- - - -
EA cp JMP ptr16:32 ---- -- - - -
EB cb JMP rel8 ---- -- - - -
EC IN AL, DX ---- -- - - -
ED IN AX, DX ---- -- - - -
ED IN EAX, DX ---- -- - - -
EE OUT DX, AL ---- -- - - -
EF OUT DX, AX ---- -- - - -
EF OUT DX, EAX ---- -- - - -
++ F0 LOCK prefix
F1 ---
++ F2 REPNE/REPNZ prefix
F2 A6 REPNE CMPS m8, m8 x--- xx x x x
F2 A7 REPNE CMPS m16, m16 x--- xx x x x
F2 A7 REPNE CMPS m32, m32 x--- xx x x x
F2 AE REPNE SCAS m8 x--- xx x x x
F2 AF REPNE SCAS m16 x--- xx x x x
F2 AF REPNE SCAS m32 x--- xx x x x
++ F3 REP prefix
++ F3 REPE/REPZ prefix
F3 6C REP INS r/m8, DX ---- -- - - -
F3 6D REP INS r/m16, DX ---- -- - - -
F3 6D REP INS r/m32, DX ---- -- - - -
F3 6E REP OUTS DX, r/m8 ---- -- - - -
F3 6F REP OUTS DX, r/m16 ---- -- - - -
F3 6F REP OUTS DX, r/m32 ---- -- - - -
F3 A4 REP MOVS m8, m8 ---- -- - - -
F3 A5 REP MOVS m16, m16 ---- -- - - -
F3 A5 REP MOVS m32, m32 ---- -- - - -
F3 A6 REPE CMPS m8, m8 x--- xx x x x
F3 A7 REPE CMPS m16, m16 x--- xx x x x
F3 A7 REPE CMPS m32, m32 x--- xx x x x
F3 AA REP STOS m8 ---- -- - - -
F3 AB REP STOS m16 ---- -- - - -
F3 AB REP STOS m32 ---- -- - - -
F3 AC REP LODS AL ---- -- - - -
F3 AD REP LODS AX ---- -- - - -
F3 AD REP LODS EAX ---- -- - - -
F3 AE REPE SCAS m8 x--- xx x x x
F3 AF REPE SCAS m16 x--- xx x x x
F3 AF REPE SCAS m32 x--- xx x x x
F4 HLT ---- -- - - -
F5 CMC ---- -- - - x
F6 /0 ib TEST r/m8, imm8 0--- xx ? x 0
F6 /1 ---
F6 /2 NOT r/m8 ---- -- - - -
F6 /3 NEG r/m8 x--- xx - x x
F6 /4 MUL AL, r/m8 x--- ?? ? ? x
F6 /5 IMUL r/m8 x--- ?? ? ? x
F6 /6 DIV AL, r/m8 ?--- ?? ? ? ?
F6 /7 IDIV AL, r/m8 ?--- ?? ? ? ?
F7 /0 id TEST r/m32, imm32 0--- xx ? x 0
F7 /0 iw TEST r/m16, imm16 0--- xx ? x 0
F7 /1 ---
F7 /2 NOT r/m16 ---- -- - - -
F7 /2 NOT r/m32 ---- -- - - -
F7 /3 NEG r/m16 x--- xx - x x
F7 /3 NEG r/m32 x--- xx - x x
F7 /4 MUL AX, r/m16 x--- ?? ? ? x
F7 /4 MUL EAX, r/m32 x--- ?? ? ? x
F7 /5 IMUL r/m16 x--- ?? ? ? x
F7 /5 IMUL r/m32 x--- ?? ? ? x
F7 /6 DIV AX, r/m16 ?--- ?? ? ? ?
F7 /6 DIV EAX, r/m32 ?--- ?? ? ? ?
F7 /7 IDIV AX, r/m16 ?--- ?? ? ? ?
F7 /7 IDIV EAX, r/m32 ?--- ?? ? ? ?
F8 CLC ---- -- - - 0
F9 STC ---- -- - - 1
FA CLI --0- -- - - -
FB STI --1- -- - - -
FC CLD -0-- -- - - -
FD STD -1-- -- - - -
FE /0 INC r/m8 x--- xx x x -
FE /1 DEC r/m8 x--- xx x x -
FE /2 ---
FE /3 ---
FE /4 ---
FE /5 ---
FE /6 ---
FE /7 ---
FF /0 INC r/m16 x--- xx x x -
FF /0 INC r/m32 x--- xx x x -
FF /1 DEC r/m16 x--- xx x x -
FF /1 DEC r/m32 x--- xx x x -
FF /2 CALL r/m16 ---- -- - - -
FF /2 CALL r/m32 ---- -- - - -
FF /3 CALL m16:16 ---- -- - - -
FF /3 CALL m16:32 ---- -- - - -
FF /4 JMP r/m16 ---- -- - - -
FF /4 JMP r/m32 ---- -- - - -
FF /5 JMP m16:16 ---- -- - - -
FF /5 JMP m16:32 ---- -- - - -
FF /6 PUSH r/m16 ---- -- - - -
FF /6 PUSH r/m32 ---- -- - - -
FF /7 ---
ÄÄÄÄÄÄÄÄÄÄÄÄ ÄÄÄÄÄÄÄÄÄÄÄ ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
opcode bytes instruction ODIT SZ-A-P-C
That's all folks..
TAD